Полный рабочий день

 ...Master degree in Electronics/Control Engineering or related field. • At least 15 years of experience of FPGA/ASIC design & simulation in VHDL/(and/or Verilog). • Good understanding of synchronous design, time constraining and static timing analysis. • Experience with... 
VHDL
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Hitachi Energy

Польша
24 дня назад

Полный рабочий день

 ...Jetson, Xilinx, or Altera FPGA SW/HW platforms  Experience with the RTL design and verification languages: Verilog, SystemVerilog, VHDL  Experience with developing Qt applications for interfacing with hardware  Linux kernel driver development experience  Senior... 
VHDL
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Clone Incorporated

Польша
1 месяц назад